ESPHome  2024.11.1
Variables
Channel registers when SPAGE=0

Definition of the register linked to a particular channel when SPAGE=0. More...

Variables

constexpr uint8_t esphome::weikai::WKREG_SPAGE = 0x03
 Global Page register c0/c1 0011. More...
 
constexpr uint8_t esphome::weikai::WKREG_SCR = 0x04
 Serial Control Register - c0/c1 0100. More...
 
constexpr uint8_t esphome::weikai::SCR_TXEN = 1 << 1
 transmission control (0: enable, 1: disable) More...
 
constexpr uint8_t esphome::weikai::SCR_RXEN = 1 << 0
 receiving control (0: enable, 1: disable) More...
 
constexpr uint8_t esphome::weikai::WKREG_LCR = 0x05
 Line Configuration Register - c0/c1 0101. More...
 
constexpr uint8_t esphome::weikai::LCR_PAEN = 1 << 3
 Parity enable (0: no check, 1: check) More...
 
constexpr uint8_t esphome::weikai::LCR_PAR_F0 = 0 << 1
 Parity force 0. More...
 
constexpr uint8_t esphome::weikai::LCR_PAR_ODD = 1 << 1
 Parity odd. More...
 
constexpr uint8_t esphome::weikai::LCR_PAR_EVEN = 2 << 1
 Parity even. More...
 
constexpr uint8_t esphome::weikai::LCR_PAR_F1 = 3 << 1
 Parity force 1. More...
 
constexpr uint8_t esphome::weikai::LCR_STPL = 1 << 0
 Stop length (0: 1 bit, 1: 2 bits) More...
 
constexpr uint8_t esphome::weikai::WKREG_FCR = 0x06
 FIFO Control Register - c0/c1 0110. More...
 
constexpr uint8_t esphome::weikai::FCR_TFEN = 1 << 3
 Transmitter FIFO enable. More...
 
constexpr uint8_t esphome::weikai::FCR_RFEN = 1 << 2
 Receiver FIFO enable. More...
 
constexpr uint8_t esphome::weikai::FCR_TFRST = 1 << 1
 Transmitter FIFO reset. More...
 
constexpr uint8_t esphome::weikai::FCR_RFRST = 1 << 0
 Receiver FIFO reset. More...
 
constexpr uint8_t esphome::weikai::WKREG_SIER = 0x07
 Serial Interrupt Enable Register (not used) - c0/c1 0111. More...
 
constexpr uint8_t esphome::weikai::WKREG_SIFR = 0x08
 Serial Interrupt Flag Register (not used) - c0/c1 1000. More...
 
constexpr uint8_t esphome::weikai::WKREG_TFCNT = 0x09
 Transmitter FIFO Count - c0/c1 1001. More...
 
constexpr uint8_t esphome::weikai::WKREG_RFCNT = 0x0A
 Receiver FIFO count - c0/c1 1010. More...
 
constexpr uint8_t esphome::weikai::WKREG_FSR = 0x0B
 FIFO Status Register - c0/c1 1011. More...
 
constexpr uint8_t esphome::weikai::FSR_RFOE = 1 << 7
 Receiver FIFO Overflow Error (0: no OE, 1: OE) More...
 
constexpr uint8_t esphome::weikai::FSR_RFLB = 1 << 6
 Receiver FIFO Line Break (0: no LB, 1: LB) More...
 
constexpr uint8_t esphome::weikai::FSR_RFFE = 1 << 5
 Receiver FIFO Frame Error (0: no FE, 1: FE) More...
 
constexpr uint8_t esphome::weikai::FSR_RFPE = 1 << 4
 Receiver Parity Error (0: no PE, 1: PE) More...
 
constexpr uint8_t esphome::weikai::FSR_RFDAT = 1 << 3
 Receiver FIFO count (0: empty, 1: not empty) More...
 
constexpr uint8_t esphome::weikai::FSR_TFDAT = 1 << 2
 Transmitter FIFO count (0: empty, 1: not empty) More...
 
constexpr uint8_t esphome::weikai::FSR_TFFULL = 1 << 1
 Transmitter FIFO full (0: not full, 1: full) More...
 
constexpr uint8_t esphome::weikai::FSR_TBUSY = 1 << 0
 Transmitter busy (0 nothing to transmit, 1: transmitter busy sending) More...
 
constexpr uint8_t esphome::weikai::WKREG_LSR = 0x0C
 Line Status Register (not used - using FIFO) More...
 
constexpr uint8_t esphome::weikai::WKREG_FDAT = 0x0D
 FIFO Data Register (not used - does not seems to work) More...
 

Detailed Description

Definition of the register linked to a particular channel when SPAGE=0.

The channel registers are further splitted into two groups. This first group is defined when the Global register WKREG_SPAGE is 0

Variable Documentation

◆ FCR_RFEN

constexpr uint8_t esphome::weikai::FCR_RFEN = 1 << 2

Receiver FIFO enable.

Definition at line 189 of file wk_reg_def.h.

◆ FCR_RFRST

constexpr uint8_t esphome::weikai::FCR_RFRST = 1 << 0

Receiver FIFO reset.

Definition at line 193 of file wk_reg_def.h.

◆ FCR_TFEN

constexpr uint8_t esphome::weikai::FCR_TFEN = 1 << 3

Transmitter FIFO enable.

Definition at line 187 of file wk_reg_def.h.

◆ FCR_TFRST

constexpr uint8_t esphome::weikai::FCR_TFRST = 1 << 1

Transmitter FIFO reset.

Definition at line 191 of file wk_reg_def.h.

◆ FSR_RFDAT

constexpr uint8_t esphome::weikai::FSR_RFDAT = 1 << 3

Receiver FIFO count (0: empty, 1: not empty)

Definition at line 251 of file wk_reg_def.h.

◆ FSR_RFFE

constexpr uint8_t esphome::weikai::FSR_RFFE = 1 << 5

Receiver FIFO Frame Error (0: no FE, 1: FE)

Definition at line 247 of file wk_reg_def.h.

◆ FSR_RFLB

constexpr uint8_t esphome::weikai::FSR_RFLB = 1 << 6

Receiver FIFO Line Break (0: no LB, 1: LB)

Definition at line 245 of file wk_reg_def.h.

◆ FSR_RFOE

constexpr uint8_t esphome::weikai::FSR_RFOE = 1 << 7

Receiver FIFO Overflow Error (0: no OE, 1: OE)

Definition at line 243 of file wk_reg_def.h.

◆ FSR_RFPE

constexpr uint8_t esphome::weikai::FSR_RFPE = 1 << 4

Receiver Parity Error (0: no PE, 1: PE)

Definition at line 249 of file wk_reg_def.h.

◆ FSR_TBUSY

constexpr uint8_t esphome::weikai::FSR_TBUSY = 1 << 0

Transmitter busy (0 nothing to transmit, 1: transmitter busy sending)

Definition at line 257 of file wk_reg_def.h.

◆ FSR_TFDAT

constexpr uint8_t esphome::weikai::FSR_TFDAT = 1 << 2

Transmitter FIFO count (0: empty, 1: not empty)

Definition at line 253 of file wk_reg_def.h.

◆ FSR_TFFULL

constexpr uint8_t esphome::weikai::FSR_TFFULL = 1 << 1

Transmitter FIFO full (0: not full, 1: full)

Definition at line 255 of file wk_reg_def.h.

◆ LCR_PAEN

constexpr uint8_t esphome::weikai::LCR_PAEN = 1 << 3

Parity enable (0: no check, 1: check)

Definition at line 161 of file wk_reg_def.h.

◆ LCR_PAR_EVEN

constexpr uint8_t esphome::weikai::LCR_PAR_EVEN = 2 << 1

Parity even.

Definition at line 167 of file wk_reg_def.h.

◆ LCR_PAR_F0

constexpr uint8_t esphome::weikai::LCR_PAR_F0 = 0 << 1

Parity force 0.

Definition at line 163 of file wk_reg_def.h.

◆ LCR_PAR_F1

constexpr uint8_t esphome::weikai::LCR_PAR_F1 = 3 << 1

Parity force 1.

Definition at line 169 of file wk_reg_def.h.

◆ LCR_PAR_ODD

constexpr uint8_t esphome::weikai::LCR_PAR_ODD = 1 << 1

Parity odd.

Definition at line 165 of file wk_reg_def.h.

◆ LCR_STPL

constexpr uint8_t esphome::weikai::LCR_STPL = 1 << 0

Stop length (0: 1 bit, 1: 2 bits)

Definition at line 171 of file wk_reg_def.h.

◆ SCR_RXEN

constexpr uint8_t esphome::weikai::SCR_RXEN = 1 << 0

receiving control (0: enable, 1: disable)

Definition at line 145 of file wk_reg_def.h.

◆ SCR_TXEN

constexpr uint8_t esphome::weikai::SCR_TXEN = 1 << 1

transmission control (0: enable, 1: disable)

Definition at line 143 of file wk_reg_def.h.

◆ WKREG_FCR

constexpr uint8_t esphome::weikai::WKREG_FCR = 0x06

FIFO Control Register - c0/c1 0110.

-------------------------------------------------------------------------
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | bit
-------------------------------------------------------------------------
| TFTRIG | RFTRIG | TFEN | RFEN | TFRST | RFRST | name
-------------------------------------------------------------------------
| W/R | W/R | W/R | W/R | W/R | W/R | W/R | W/R | type
-------------------------------------------------------------------------
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | reset
-------------------------------------------------------------------------

Definition at line 185 of file wk_reg_def.h.

◆ WKREG_FDAT

constexpr uint8_t esphome::weikai::WKREG_FDAT = 0x0D

FIFO Data Register (not used - does not seems to work)

Definition at line 263 of file wk_reg_def.h.

◆ WKREG_FSR

constexpr uint8_t esphome::weikai::WKREG_FSR = 0x0B

FIFO Status Register - c0/c1 1011.

-------------------------------------------------------------------------
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | bit
-------------------------------------------------------------------------
| RFOE | RFLB | RFFE | RFPE | RFDAT | TFDAT | TFFULL | TBUSY | name
-------------------------------------------------------------------------
| R | W/R | W/R | W/R | W/R | W/R | W/R | W/R | type
-------------------------------------------------------------------------
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | reset
-------------------------------------------------------------------------
Warning
The received buffer can hold 256 bytes. However, as the RFCNT reg is 8 bits, if we have 256 byte in the register this is reported as 0 ! Therefore RFCNT=0 can indicate that there are 0 or 256 bytes in the buffer. If we have RFDAT = 1 and RFCNT = 0 it should be interpreted as 256 bytes in the FIFO.
Note
Note that in case of overflow the RFOE goes to one but as soon as you read the FSR this bit is cleared. Therefore Overflow can be read only once.
The same problem applies to the transmit buffer but here we have to check the TFFULL flag. So if TFFULL is set and TFCNT is 0 this should be interpreted as 256

Definition at line 241 of file wk_reg_def.h.

◆ WKREG_LCR

constexpr uint8_t esphome::weikai::WKREG_LCR = 0x05

Line Configuration Register - c0/c1 0101.

-------------------------------------------------------------------------
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | bit
-------------------------------------------------------------------------
| RSV | BREAK | IREN | PAEN | PARITY | STPL | name
-------------------------------------------------------------------------
| W/R | W/R | W/R | W/R | W/R | W/R | W/R | W/R | type
-------------------------------------------------------------------------
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | reset
-------------------------------------------------------------------------

Definition at line 159 of file wk_reg_def.h.

◆ WKREG_LSR

constexpr uint8_t esphome::weikai::WKREG_LSR = 0x0C

Line Status Register (not used - using FIFO)

Definition at line 260 of file wk_reg_def.h.

◆ WKREG_RFCNT

constexpr uint8_t esphome::weikai::WKREG_RFCNT = 0x0A

Receiver FIFO count - c0/c1 1010.

-------------------------------------------------------------------------
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
-------------------------------------------------------------------------
| NUMBER OF DATA IN RECEIVER FIFO |
-------------------------------------------------------------------------

Definition at line 219 of file wk_reg_def.h.

◆ WKREG_SCR

constexpr uint8_t esphome::weikai::WKREG_SCR = 0x04

Serial Control Register - c0/c1 0100.

-------------------------------------------------------------------------
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | bit
-------------------------------------------------------------------------
| RSV | SLPEN | TXEN | RXEN | name
-------------------------------------------------------------------------
| R | R | R | R | R | R/W | R/W | W/R | type
-------------------------------------------------------------------------
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | reset
-------------------------------------------------------------------------

Definition at line 141 of file wk_reg_def.h.

◆ WKREG_SIER

constexpr uint8_t esphome::weikai::WKREG_SIER = 0x07

Serial Interrupt Enable Register (not used) - c0/c1 0111.

Definition at line 196 of file wk_reg_def.h.

◆ WKREG_SIFR

constexpr uint8_t esphome::weikai::WKREG_SIFR = 0x08

Serial Interrupt Flag Register (not used) - c0/c1 1000.

Definition at line 199 of file wk_reg_def.h.

◆ WKREG_SPAGE

constexpr uint8_t esphome::weikai::WKREG_SPAGE = 0x03

Global Page register c0/c1 0011.

-------------------------------------------------------------------------
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | bit
-------------------------------------------------------------------------
| RSV | PAGE | name
-------------------------------------------------------------------------
| R | R | R | R | R | R | R | W/R | type
-------------------------------------------------------------------------
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | reset
-------------------------------------------------------------------------

Definition at line 127 of file wk_reg_def.h.

◆ WKREG_TFCNT

constexpr uint8_t esphome::weikai::WKREG_TFCNT = 0x09

Transmitter FIFO Count - c0/c1 1001.

-------------------------------------------------------------------------
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
-------------------------------------------------------------------------
| NUMBER OF DATA IN TRANSMITTER FIFO |
-------------------------------------------------------------------------

Definition at line 209 of file wk_reg_def.h.