const uint8_t REG_POLARITY_A
const uint8_t REG_POLARITY_B
const uint8_t REG_KEY_DATA_1
const uint8_t REG_HIGH_INPUT_B
const uint8_t REG_I_ON_10
const uint8_t REG_PULL_UP_A
const uint8_t REG_PULL_DOWN_A
const uint8_t REG_LED_DRIVER_ENABLE_A
const uint8_t REG_SENSE_HIGH_B
const uint8_t REG_LEVEL_SHIFTER_2
const uint8_t REG_EVENT_STATUS_B
const uint8_t REG_LED_DRIVER_ENABLE_B
const uint8_t REG_INTERRUPT_MASK_B
const uint8_t REG_LONG_SLEW_A
const uint8_t REG_DEBOUNCE_ENABLE_B
const uint8_t REG_SENSE_HIGH_A
const uint8_t REG_I_ON_15
const uint8_t REG_SENSE_LOW_B
const uint8_t REG_INPUT_DISABLE_B
const uint8_t REG_KEY_CONFIG_1
const uint8_t REG_INTERRUPT_MASK_A
const uint8_t REG_HIGH_INPUT_A
const uint8_t REG_EVENT_STATUS_A
const uint8_t REG_I_ON_14
const uint8_t REG_I_ON_13
const uint8_t REG_LOW_DRIVE_B
const uint8_t REG_I_ON_12
const uint8_t REG_LONG_SLEW_B
const uint8_t REG_I_ON_11
const uint8_t REG_INTERRUPT_SOURCE_A
const uint8_t REG_SENSE_LOW_A
Implementation of SPI Controller mode.
const uint8_t REG_LEVEL_SHIFTER_1
const uint8_t REG_PULL_UP_B
const uint8_t REG_DEBOUNCE_ENABLE_A
const uint8_t REG_KEY_CONFIG_2
const uint8_t REG_OPEN_DRAIN_A
const uint8_t REG_KEY_DATA_2
const uint8_t REG_OPEN_DRAIN_B
const uint8_t REG_LOW_DRIVE_A
const uint8_t REG_INTERRUPT_SOURCE_B
const uint8_t REG_PULL_DOWN_B
const uint8_t REG_DEBOUNCE_CONFIG
const uint8_t REG_INPUT_DISABLE_A