8 static const char *
const TAG =
"spi-esp-idf";
9 static const size_t MAX_TRANSFER_SIZE = 4092;
11 class SPIDelegateHw :
public SPIDelegate {
15 :
SPIDelegate(data_rate, bit_order, mode, cs_pin), channel_(channel), write_only_(write_only) {
16 spi_device_interface_config_t config = {};
17 config.mode =
static_cast<uint8_t
>(
mode);
18 config.clock_speed_hz =
static_cast<int>(data_rate);
19 config.spics_io_num = -1;
21 config.queue_size = 1;
22 config.pre_cb =
nullptr;
23 config.post_cb =
nullptr;
25 config.flags |= SPI_DEVICE_BIT_LSBFIRST;
27 config.flags |= SPI_DEVICE_HALFDUPLEX | SPI_DEVICE_NO_DUMMY;
28 esp_err_t
const err = spi_bus_add_device(channel, &config, &this->handle_);
30 ESP_LOGE(TAG,
"Add device failed - err %X", err);
33 bool is_ready()
override {
return this->handle_ !=
nullptr; }
35 void begin_transaction()
override {
36 if (this->is_ready()) {
37 if (spi_device_acquire_bus(this->handle_, portMAX_DELAY) != ESP_OK)
38 ESP_LOGE(TAG,
"Failed to acquire SPI bus");
41 ESP_LOGW(TAG,
"spi_setup called before initialisation");
45 void end_transaction()
override {
46 if (this->is_ready()) {
48 spi_device_release_bus(this->handle_);
52 ~SPIDelegateHw()
override {
53 esp_err_t
const err = spi_bus_remove_device(this->handle_);
55 ESP_LOGE(TAG,
"Remove device failed - err %X", err);
62 void transfer(
const uint8_t *txbuf, uint8_t *rxbuf,
size_t length)
override {
63 if (rxbuf !=
nullptr && this->write_only_) {
64 ESP_LOGE(TAG,
"Attempted read from write-only channel");
67 spi_transaction_t desc = {};
70 size_t const partial = std::min(length, MAX_TRANSFER_SIZE);
71 desc.length = partial * 8;
72 desc.rxlength = this->write_only_ ? 0 : partial * 8;
73 desc.tx_buffer = txbuf;
74 desc.rx_buffer = rxbuf;
76 esp_err_t err = spi_device_polling_start(this->handle_, &desc, portMAX_DELAY);
78 err = spi_device_polling_end(this->handle_, portMAX_DELAY);
81 ESP_LOGE(TAG,
"Transmit failed - err %X", err);
92 void write(uint16_t data,
size_t num_bits)
override {
93 spi_transaction_ext_t desc = {};
94 desc.command_bits = num_bits;
95 desc.base.flags = SPI_TRANS_VARIABLE_CMD;
97 esp_err_t err = spi_device_polling_start(this->handle_, (spi_transaction_t *) &desc, portMAX_DELAY);
99 err = spi_device_polling_end(this->handle_, portMAX_DELAY);
103 ESP_LOGE(TAG,
"Transmit failed - err %X", err);
117 void write_cmd_addr_data(
size_t cmd_bits, uint32_t
cmd,
size_t addr_bits, uint32_t
address,
const uint8_t *data,
118 size_t length, uint8_t bus_width)
override {
119 spi_transaction_ext_t desc = {};
120 if (length == 0 && cmd_bits == 0 && addr_bits == 0) {
121 esph_log_w(TAG,
"Nothing to transfer");
124 desc.base.flags = SPI_TRANS_VARIABLE_ADDR | SPI_TRANS_VARIABLE_CMD | SPI_TRANS_VARIABLE_DUMMY;
125 if (bus_width == 4) {
126 desc.base.flags |= SPI_TRANS_MODE_QIO;
127 }
else if (bus_width == 8) {
128 desc.base.flags |= SPI_TRANS_MODE_OCT;
130 desc.command_bits = cmd_bits;
131 desc.address_bits = addr_bits;
133 desc.base.rxlength = 0;
137 size_t chunk_size = std::min(length, MAX_TRANSFER_SIZE);
138 if (data !=
nullptr && chunk_size != 0) {
139 desc.base.length = chunk_size * 8;
140 desc.base.tx_buffer = data;
141 length -= chunk_size;
145 desc.base.length = 0;
147 esp_err_t err = spi_device_polling_start(this->handle_, (spi_transaction_t *) &desc, portMAX_DELAY);
149 err = spi_device_polling_end(this->handle_, portMAX_DELAY);
152 ESP_LOGE(TAG,
"Transmit failed - err %X", err);
156 desc.command_bits = 0;
157 desc.address_bits = 0;
158 }
while (length != 0);
161 void transfer(uint8_t *ptr,
size_t length)
override { this->transfer(ptr, ptr, length); }
163 uint8_t transfer(uint8_t data)
override {
165 this->transfer(&data, &rxbuf, 1);
169 void write16(uint16_t data)
override { this->write(data, 16); }
171 void write_array(
const uint8_t *ptr,
size_t length)
override { this->transfer(ptr,
nullptr, length); }
173 void write_array16(
const uint16_t *data,
size_t length)
override {
175 this->write_array((uint8_t *) data, length * 2);
177 uint16_t buffer[MAX_TRANSFER_SIZE / 2];
178 while (length != 0) {
179 size_t const partial = std::min(length, MAX_TRANSFER_SIZE / 2);
180 for (
size_t i = 0; i != partial; i++) {
181 buffer[i] = SPI_SWAP_DATA_TX(*data++, 16);
183 this->write_array((
const uint8_t *) buffer, partial * 2);
189 void read_array(uint8_t *ptr,
size_t length)
override { this->transfer(
nullptr, ptr, length); }
193 spi_device_handle_t handle_{};
194 bool write_only_{
false};
197 class SPIBusHw :
public SPIBus {
199 SPIBusHw(GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi,
SPIInterface channel, std::vector<uint8_t> data_pins)
200 : SPIBus(clk, sdo, sdi), channel_(channel) {
201 spi_bus_config_t buscfg = {};
203 buscfg.flags = SPICOMMON_BUSFLAG_MASTER | SPICOMMON_BUSFLAG_SCLK;
204 if (data_pins.empty()) {
207 buscfg.quadwp_io_num = -1;
208 buscfg.quadhd_io_num = -1;
210 buscfg.data0_io_num = data_pins[0];
211 buscfg.data1_io_num = data_pins[1];
212 buscfg.data2_io_num = data_pins[2];
213 buscfg.data3_io_num = data_pins[3];
214 buscfg.data4_io_num = -1;
215 buscfg.data5_io_num = -1;
216 buscfg.data6_io_num = -1;
217 buscfg.data7_io_num = -1;
218 buscfg.flags |= SPICOMMON_BUSFLAG_QUAD;
220 buscfg.max_transfer_sz = MAX_TRANSFER_SIZE;
221 auto err = spi_bus_initialize(channel, &buscfg, SPI_DMA_CH_AUTO);
223 ESP_LOGE(TAG,
"Bus init failed - err %X", err);
226 SPIDelegate *get_delegate(uint32_t data_rate,
SPIBitOrder bit_order,
SPIMode mode, GPIOPin *cs_pin)
override {
227 return new SPIDelegateHw(this->channel_, data_rate, bit_order, mode, cs_pin,
234 bool is_hw()
override {
return true; }
238 const std::vector<uint8_t> &data_pins) {
239 return new SPIBusHw(clk, sdo, sdi, interface, data_pins);
SPIClassRP2040 * SPIInterface
static int get_pin_no(GPIOPin *pin)
BedjetMode mode
BedJet operating mode.
SPIMode
Modes mapping to clock phase and polarity.
virtual void end_transaction()
virtual void begin_transaction()
static SPIBus * get_bus(SPIInterface interface, GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi, const std::vector< uint8_t > &data_pins)
SPIBitOrder
The bit-order for SPI devices. This defines how the data read from and written to the device is inter...
Implementation of SPI Controller mode.
The least significant bit is transmitted/received first.